Quantum Computing Report

D-Wave Demonstrates 3D Analog-Digital Quantum Simulation of Higher-Order Topological Insulators Using 728 Qubits

Realizing and probing bulk topology.

In a research study published on arXiv, scientists at D-Wave Quantum (Pratik Sathe, Andrew D. King, and collaborators) have demonstrated the realization and characterization of 1D, 2D, and 3D higher-order topological insulators (HOTIs) on an Advantage2 superconducting quantum annealing processor using up to 728 qubits.

Detailed in the paper (“Measuring higher-order bulk topology in a programmable quantum simulator“), the team deployed new analog-digital quantum control protocols to measure localized boundary modes and extract 3D bulk topological invariants via band projector tomography.

[ Experimental Performance & Topological Benchmark Comparison ]
Topological Model / DimensionQubit Count / SetupBoundary Measurement (LDOS)Bulk Topological Invariant
• 1D SSH Model• 64 Qubits (L = 32 Chain)• In-Gap Fractional End Modes• Zak Phase (γ = π)
• 2D BBH Quadrupole Insulator• 364 Dimers (L = 13 Skew)• Localized Zero-D Corner Modes• 2D Quadrupole Moment (pxy = 1/2)
• 3D BBH Octupole Insulator• 432 Qubits (3x3x3 Lattice)• Gapped Bulk/Face/Hinge + Corners• 3D Octupole Moment (1/2)

Analog-Digital Control Protocols & Dimerized 3D Lattices

Traditional quantum annealing applications rely on slow global quenches or static ground-state sampling. D-Wave’s new analog-digital architecture combines pulse-level state initialization, coherent static Hamiltonian evolution, and high-frequency time-series measurements:

The demonstration confirms that analog-digital quantum annealing hardware can serve as a programmable simulator for multi-dimensional condensed matter physics and non-interacting topological materials.

Review Andrew King’s summary on LinkedIn here and inspect the technical manuscript on arXiv here.

October 17, 2026

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