Researchers from Yonsei University have developed a neural quantum error correction (QEC) decoder based on the Mamba structured state-space architecture, reducing the computational complexity of deep-learning decoding from O(d4) to O(d2) in code distance d. In peer-reviewed research published in npj Quantum Information, the team demonstrated that the state-space model matches the accuracy of Transformer-based models such as AlphaQubit on experimental memory benchmarks while eliminating the quadratic self-attention bottlenecks that prevent real-time feedback on physical quantum hardware.
State-Space Syndrome Processing and Real-Time Decoding Metrics
In planar surface codes, syndrome extraction generates sequences scaling with the number of stabilizers (Nstab = d2 − 1). Standard Transformer neural decoders utilize multi-head self-attention mechanisms that perform pairwise comparisons between all stabilizer tokens, yielding an O(d4) scaling that accumulates latency backlogs well beyond microsecond superconducting coherence limits. The Mamba decoder replaces explicit multi-head attention with selective state-space layers, utilizing input-dependent linear scans to maintain historical syndrome contexts within compressed hidden states. Evaluated on the Google Quantum AI Sycamore hardware dataset, the state-space architecture matched Transformer accuracy in static memory benchmarks and maintained an error-suppression advantage when accounting for decoder-induced latency noise.
| Decoding Performance and Scaling Metrics across Surface Code Benchmarks | ||
|---|---|---|
| Evaluation Metric | Mamba Decoder | Transformer Decoder (AlphaQubit Baseline) |
| Core Computational Complexity | O(d2) (Linear in syndrome tokens) | O(d4) (Quadratic pairwise self-attention) |
| Sycamore Memory LER (d = 3) | 2.981 × 10−2 | ∼ 2.98 × 10−2 |
| Sycamore Memory LER (d = 5) | 2.916 × 10−2 | ∼ 2.91 × 10−2 |
| Real-Time LER at d = 9 (With Latency Noise) | 1.59 × 10−5 | 6.82 × 10−5 |
| Effective Threshold Crossings (d = 7 to d = 9) | pth ≈ 0.0067 | pth ≈ 0.0043 |
Inference Latency Limits and Hardware Deployment Constraints
The performance divergence under simulated real-time conditions underscores a foundational constraint in fault-tolerant quantum computing: when decoders cannot process syndromes within the physical cycle time (typically 200 to 1,000 ns on superconducting hardware), idling physical data qubits accumulate uncorrected environmental noise. Under the circuit-level depolarizing SI1000 model, the latency-induced error gap between the two neural models expanded monotonically from d = 3 through d = 9. However, while Mamba resolves the attention-scaling bottleneck, translating neural state-space decoders into physical control stacks requires overcoming edge-compute limitations. Practical implementation requires porting the recurrent core, dilated convolutions, and ResNet feature embedders onto low-latency field-programmable gate arrays (FPGAs) or custom application-specific integrated circuits (ASICs) to execute inference within sub-microsecond cycle budgets.
The peer-reviewed paper is available in npj Quantum Information, with open-source numerical datasets hosted on GitHub.
October 28, 2026