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Jülich Supercomputing Centre Benchmark Evaluates Quantum Error Correction Primitives Across Quantinuum, IBM, and IQM Hardware

A benchmark study published by researchers at Germany’s Jülich Supercomputing Centre (JSC) has evaluated key Quantum Error Correction (QEC) primitives, including mid-circuit measurement (MCM), qubit reset, dynamic feed-forward control, and spectator idling, across ten commercial quantum processing units (QPUs) from Quantinuum, IBM, and IQM.

The study, titled “Evaluating the performance of QEC primitives on quantum processors at large width and depth“ (arXiv:2610.05928), introduces a low-sampling algorithmic benchmark utilizing a Linear-Ramp Quantum Approximate Optimization Algorithm (LR-QAOA) framework. By mapping the interaction and check structures of distance-scaled surface codes, triangular color codes, and bivariate-bicycle quantum Low-Density Parity-Check (qLDPC) codes directly into the algorithm, the researchers measured effective depolarizing error rates (λeff) accumulated during repeated syndrome-extraction rounds.

2-qubit MCM experiment on different QPUs.
[ Jülich Supercomputing Centre QEC Primitive Benchmark Findings ]
QPU Platform / VendorEffective Hardware Error (λeff)Tested Code Structures & ScaleArchitectural Impact & Connectivity
• Quantinuum
(Helios-1, H2-1)
• λeff ~ 0.22% to 0.49%
(MCM error comparable to baseline 2Q gates)
• Surface codes (up to d=9, 81 qubits)
• Color codes (up to d=11, 91 qubits)
• qLDPC BB48 (48 data qubits, 44 MCMs/layer)
• ~13x lower hardware error at 30 data qubits and ~8x lower at 50 data qubits vs. superconducting systems. Mobile-qubit QCCD architecture enables multi-code testing.
• IBM Quantum
(Heron & Eagle QPUs)
• λeff ~ 1.1% to 3.2%
(MCM error remains ~10x baseline 2Q gates)
• Surface codes (up to d=5, 25 qubits)
• Validated against logical memory runs on ibm_phoenix (ρs ~0.83 to 0.88)
• Generational gains demonstrated on Heron (ibm_boston), but fixed planar grid constraints limited evaluation strictly to surface codes.
• IQM Quantum
(Emerald, Garnet)
• Accelerated signal decay beyond 2-data-qubit chains• 1D MCM chains & minimal triplet configurations• Conditional control latency and routing constraints restricted multi-qubit syndrome extraction.

According to the findings, Quantinuum’s trapped-ion systems demonstrated the strongest overall performance across the tested QEC primitives, maintaining algorithmic signal clarity (r = 0.733) on a 91-data-qubit triangular color code requiring 45 MCM operations per layer across 98 physical qubits. In comparative scaling, Quantinuum’s Helios processor achieved an effective hardware error rate approximately 13 times lower at 30 data qubits and 8 times lower at 50 data qubits than the top-performing superconducting processors evaluated. Furthermore, while mobile-qubit Quantum Charge-Coupled Device (QCCD) flexible connectivity allowed researchers to test three distinct QEC code families, surface codes, triangular color codes, and bivariate-bicycle qLDPC codes, on Quantinuum hardware, planar grid constraints restricted superconducting evaluations to surface codes.

Additionally, the researchers validated the benchmark on an 11-patch surface-code (d=3) memory experiment on ibm_phoenix, establishing a high correlation (ρs = 0.83 to 0.88) between the low-shot LR-QAOA metric and actual logical error survival probabilities (PL).

Review the full pre-print manuscript on arXiv here and examine vendor performance analysis in the Quantinuum Blog here.

October 7, 2026 / Updated: October 9, 2026

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