News

SEALSQ and Lattice Deliver Unified TPM-FPGA Architecture for Post-Quantum Security

1 min read

Share

SEALSQ Corp (NASDAQ: LAES) and Lattice Semiconductor (NASDAQ: LSCC) have announced a collaboration to integrate advanced post-quantum cryptography (PQC) into select Lattice FPGA solutions using a unified TPM-FPGA architecture. This collaboration addresses the urgent requirement for quantum-resistant security in mission-critical edge computing and industrial infrastructure. By combining SEALSQ’s specialized post-quantum hardware with Lattice’s low-power, secure FPGA platforms, the partnership provides a scalable reference design for organizations transitioning to CNSA 2.0 and NIST standards.

The joint solution features a Proof-of-Concept (PoC) that integrates a Lattice secure FPGA with SEALSQ’s QS7001 and QVault TPM secure Root-of-Trust (RoT). The QS7001 is a hardware-embedded PQC chip designed on a 32-bit secured RISC-V architecture. It provides hardware acceleration for NIST-selected algorithms, including ML-KEM (formerly Kyber) for key encapsulation and ML-DSA (formerly Dilithium) for digital signatures. This hardware-native approach offers significant performance gains and enhanced side-channel resistance compared to software-only PQC implementations.

Key Technical Features of the Unified Architecture

  • Quantum-Resistant Root-of-Trust: The QVault TPM acts as an immutable starting point for system security, ensuring secure boot, attestation, and cryptographic key management that remains resilient against quantum attacks.
  • Crypto-Agility at the Edge: The architecture supports in-field updates, allowing organizations to update cryptographic algorithms as standards evolve without replacing physical hardware.
  • Hardware-Accelerated PQC: By embedding algorithms directly in silicon, the system achieves up to 10x performance gains for quantum-safe key exchanges and authentication.
  • High-Assurance Certification: The underlying hardware is designed for Common Criteria EAL5+ and FIPS 140-3 readiness, meeting the stringent requirements of defense, medical, and energy infrastructure.

This initiative aligns with the launch of the Year of Quantum Security 2026 (YQS2026), a global movement emphasizing that quantum-safe migration is now a governance and infrastructure imperative. SEALSQ and Lattice will showcase a live demonstration of this unified FPGA-TPM architecture at Embedded World 2026 in Nuremberg, Germany, from March 10-12. The exhibit will highlight the solution’s ability to deliver trusted resilience and crypto-updatability for edge devices in the quantum era.

In GQI Portal

The players behind the news

The team that writes QCR tracks every company, deal and technology in the GQI Factory, GQI's verified database of the quantum industry. Next up: every story linked to its players, coming to QCR's paid plans.

  • Players Companies and institutions across the quantum industry, by segment.
  • Scorecards How the players compare on hardware, software, funding and more.