Post-quantum semiconductor and digital identity developer SEALSQ Corp (NASDAQ: LAES) has announced an engineering update on QASIC (Quantum-Resistant Application-Specific Integrated Circuit), its sovereign post-quantum ASIC platform developed through its French chip design subsidiary, IC’Alps.
The initiative embeds hardware-accelerated Post-Quantum Cryptography (PQC) directly into customer-owned, application-specific silicon architectures. The joint engineering track remains on schedule to deliver its first functional prototype in 2026.
| [ SEALSQ / IC’Alps QASIC Integrated Platform Architecture ] | ||
|---|---|---|
| PQC Semiconductor Offering | IC’Alps Design & IP Capabilities | Target Sectors & Deployment |
| • Catalog PQC Integrated Circuits | • RISC-V SoC Infrastructure & Functional Safety | • Cybersecurity & HSMs |
| • Custom QASICs & Reusable IP | • Ultra-Low Power Analog & Mixed-Signal Design | • Connected Medical & Diagnostics |
| • Chiplet Hardware Security Modules | • Certified Production & Foundry Ecosystem | • SDVs, Autonomous Driving & V2X |
Embedding Post-Quantum Security at the Silicon Level
Standard microcontrollers and classical Hardware Security Modules (HSMs) rely on public-key algorithms (such as RSA and ECC) vulnerable to quantum decryption. The QASIC framework combines SEALSQ’s post-quantum root-of-trust IP with IC’Alps’ mixed-signal and analog ASIC capabilities to support three target markets:
- Cybersecurity & Infrastructure: Secure microcontrollers, identity authentication engines, secure communications, data protection, and critical infrastructure HSMs.
- Medical & Healthcare Devices: Implantable devices, connected diagnostic equipment, patient monitors, and healthcare data security.
- Automotive Systems: Software-Defined Vehicles (SDVs), autonomous driving compute units, Vehicle-to-Everything (V2X) communications, secure Over-the-Air (OTA) updates, and telematics.
Integrated Product Portfolio and Global Foundry Ecosystem
QASIC operates as part of SEALSQ’s three-tier post-quantum hardware architecture:
- Catalog Integrated Circuits: Standard off-the-shelf security microcontrollers incorporating pre-certified PQC IP.
- Custom ASICs & Reusable IP: Fully customized QASIC implementations designed around specific customer power, latency, and area (PPA) constraints.
- Chiplet-Based Security Architectures: Next-generation Chiplet-based Hardware Security Modules (CHSMs) integrating pre-certified secure enclaves.
IC’Alps contributes domain expertise across RISC-V-based System-on-Chip (SoC) architectures, embedded non-volatile memory, functional safety (ISO 26262), and power management. The subsidiary manages production across a global semiconductor foundry network, including TSMC, GlobalFoundries, STMicroelectronics, Intel Foundry, X-FAB, and ams-OSRAM.
Led by SEALSQ CEO Carlos Moreira and IC’Alps General Manager Jean-Luc Triouleyre, the QASIC platform anchors SEALSQ’s broader “Quantum Corridor,” linking semiconductor engineering across Switzerland, France, Spain, the U.S., Korea, and the UAE.
Review the announcement on GlobeNewswire here, and examine our previous coverage of SEALSQ Announces QASIC Initiative to Develop Quantum-Resistant ASICs with IC’Alps here, SEALSQ Boosts Quantum Investment Fund to Over $100 Million for European Sovereignty here, and SEALSQ Acquires Miraex to Finalize Quantum Sovereign Vertical Stack here.
August 26, 2026
Leave A Comment