In a comprehensive architectural series, IonQ has detailed the “Walking Cat” blueprint, a complete engineering specification for a fault-tolerant quantum computer (FTQC) utilizing trapped-ion technology. The architecture is designed to bridge the gap between theoretical error correction and physical implementation by leveraging two proven hardware capabilities: high-fidelity two-qubit gates (exceeding 99.99%) and reliable ion transport within a Quantum Charge-Coupled Device (QCCD) chip. By physically shuttling ions across a grid of specialized zones, the system achieves any-to-any connectivity without the fixed-wiring constraints common in superconducting platforms.

The blueprint is organized around the HMRS principles—Hierarchy, Modularity, Regularity, and Simplicity—derived from classical computer architecture. It utilizes a unified framework of Quantum Low-Density Parity-Check (QLDPC) codes, specifically generalized bicycle and cyclic hypergraph product codes, across all system components. This technical choice allows a single decoder to manage memory blocks, “cat factories” (for logical measurements), and “magic state factories” (for non-Clifford gates), significantly reducing the engineering complexity of the fault-tolerant stack.

The Role of “Walking” Cat States

The architecture’s name reflects its operational mechanics. “Cat states” are used as non-destructive probes to perform logical measurements; they interact with logical qubits to extract error syndromes without collapsing the underlying quantum information. “Walking” refers to the physical movement of these ions through the QCCD grid to dedicated zones for gate execution and reset. This mobility allows the architecture to scale by adding more functional zones rather than complex wiring, supporting IonQ’s long-term objective of reaching 2 million physical qubits and 80,000 logical qubits by 2030.

Resource Estimates and Applications

IonQ provided quantitative benchmarks for the architecture’s utility in materials science. To simulate a 100-site Heisenberg Hamiltonian to chemical accuracy—a task considered classically intractable—the “Walking Cat” requires approximately 10,000 physical qubits. The estimated execution time for such a simulation is roughly one month. Additionally, the team demonstrated the universal nature of the architecture’s logical instruction set by successfully compiling Shor’s period-finding algorithm for a 20-bit integer onto a 102-qubit instance.

Hardware-Specific Error Management

A critical feature of the blueprint is the qubit factory, a specialized component designed to handle physical qubit loss and leakage. Because atomic ions can occasionally be lost from traps, the architecture incorporates local reservoirs to detect and replace lost ions in real-time, preventing the corruption of the QLDPC blocks. This “closed-loop” operational model, combined with streaming decoders, ensures that the system can sustain the long-duration executions required for fault-tolerant instructions.

By providing an end-to-end specification—covering the compiler, logical architecture, and micro-architecture—IonQ has established a buildable baseline for the next era of quantum computing. The architecture is designed to be configurable, allowing researchers to adjust “sliders” for speed and fidelity depending on the specific requirements of the quantum algorithm being executed.

You can access IonQ’s full technical blog series on the Walking Cat Architecture here and the original research paper on arXiv here. For comparison, refer to our previous coverage on architectural blueprints for fault-tolerant systems here and the parallel architectural study for neutral-atom arrays here.

May 7, 2026

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