Author: Mohamed Abdel-Kareem

    1. Fujitsu Open-Sources OpenQARP Framework to Streamline Quantum Application Development

      Fujitsu has open-sourced OpenQARP, a quantum application development framework, under the Apache License 2.0. Available on GitHub, it offers over 100 modular software components to simplify NISQ and FTQC application workflows, potentially reducing code volume by up to 70%. The library includes Fujitsu-developed algorithms for various quantum computing tasks and supports execution across Python, NVIDIA CUDA-Q, and Fujitsu's 40-qubit simulator.

    2. ParityQC Launches Parity Twine Optimizer via IBM Qiskit Functions Catalog

      ParityQC has launched the Parity Twine Optimizer, a new compiler available through the IBM Qiskit Functions Catalog. This technology aims to improve quantum computing by natively mapping optimization problems to quantum hardware, thereby eliminating classical SWAP gate overhead and reducing circuit depth. It supports various hardware topologies and offers a 30-day free trial for IBM Quantum Network members.

    3. Emergence Quantum and AirTrunk Partner to Develop Hyperscale Cryogenic Data Center Infrastructure

      Emergence Quantum and AirTrunk have partnered to develop hyperscale cryogenic data center infrastructure, aiming to overcome physical scaling bottlenecks in high-density AI and HPC workloads. This collaboration will focus on engineering integrated, campus-scale cryogenic cooling infrastructure to support sub-100 Kelvin classical CMOS logic, superconducting interconnects, and fault-tolerant quantum computing. The initiative will also explore liquid air cooling and energy storage, with the goal of creating a commercial blueprint for "quantum-ready" hyperscale facilities.

    4. Quantum Computing Inc. Signs Three-Year Framework Agreement with Hamad Bin Khalifa University for Middle East QPU Deployment

      Quantum Computing Inc. has signed a three-year agreement with Hamad Bin Khalifa University in Qatar, focusing on quantum computing, sensing, and communications. This partnership will establish a Dirac-3 Entropy Quantum Computer in Qatar, offering cloud access and on-premises hardware for advanced optimization problems. The collaboration aims to foster joint research, workforce training, and regional technology deployment across the Gulf Cooperation Council.

    5. TOYO Corporation Acquires Second On-Premises IQM System to Open Dual-QPU Testbed for Japan’s Ecosystem

      TOYO Corporation has expanded its quantum hardware by acquiring an IQM Spark (5-qubit) in addition to its previous order of a 20-qubit IQM Radiance processor from IQM Quantum Computers. These systems, expected to be operational by early 2027, will establish a dual-QPU testbed in Japan, offering open access to universities, startups, and industrial researchers to advance quantum technology and achieve national strategic targets.

    6. NVIDIA Unveils CUDA-Q Logical to Accelerate Fault-Tolerant System Orchestration Across Hardware Modalities

      NVIDIA has launched CUDA-Q Logical, an extension to its open-source accelerated quantum computing platform, aimed at accelerating fault-tolerant quantum computing by unifying the design of high-level algorithms, quantum error correction codes, and QPU micro-architectures. This framework, detailed in a new research publication, allows for direct derivation of full-stack resource estimates and has shown significant speedups in fault-tolerant system resource modeling at national laboratories like Fermilab. The release coincides with wide adoption of NVIDIA’s NVQLink interconnect and GPU-accelerated quantum simulation libraries, fostering an auditable foundation for utility-scale quantum-GPU supercomputers.

    7. MITRE, Quantum Brilliance, NVIDIA, and SandboxAQ Introduce GPU-Accelerated Digital Twin Framework for Quantum Sensor Error Attribution

      A collaboration including MITRE, Quantum Brilliance, NVIDIA, and SandboxAQ has developed a GPU-accelerated digital twin framework for quantum sensor error attribution, detailed in an arXiv preprint. This framework automates error budgeting by evaluating sensitivity, accuracy bias, and parameter-drift robustness, identifying key performance limiters for NV diamond ensembles and validating on a cesium OPM array for biomagnetic imaging. The research highlights that optimizing for sensitivity alone doesn't guarantee accuracy and that software-based noise rejection is crucial for clinical targets.

    8. IonQ Demonstrates Hybrid HPC and Quantum-AI Workflows Across Nine Peer-Reviewed Papers at IEEE Quantum Week 2026

      At IEEE Quantum Week 2026, IonQ presented nine peer-reviewed papers, with four receiving Best Paper Awards, showcasing advancements in hybrid HPC and quantum-AI workflows. Their work, utilizing IonQ's quantum hardware alongside NVIDIA software, demonstrated significant progress in enterprise engineering optimization (e.g., accelerating 35-million-element mesh simulations by up to 14.6% with Synopsys), quantum-accelerated AI architectures (e.g., 24% error reduction in AI classification with QuantumBasel), and dynamic error mitigation. This research highlights the practical application and performance benefits of quantum computing across various fields.

    1. QC Design Integrates Plaquette Platform with NVIDIA CUDA-Q Logical for Hardware-Realistic FTQC Simulation

      QC Design has integrated its Plaquette platform with NVIDIA CUDA-Q Logical, announced on September 14, 2026. This integration allows for hardware-realistic fault-tolerant quantum computing (FTQC) simulations by connecting high-level quantum error correction (QEC) circuit compilation with device-specific physical noise models. This enables evaluation of QEC code structures under continuous non-Pauli noise models, addressing discrepancies in traditional FTQC resource estimation. An initial study showed a 0.2% leakage rate on two-qubit entangling gates degraded the fault-tolerant circuit noise threshold by approximately 60%.

    2. IQM Adopts NVIDIA CUDA-Q Logical Framework to Drive Open-Architecture Fault-Tolerant System Benchmarking

      At IEEE Quantum Week 2026, IQM Quantum Computers announced the adoption of NVIDIA CUDA-Q Logical within their Halocene quantum error correction product line. This integration allows for the standardization of high-level logical circuit descriptions, enabling QEC algorithm workloads to be compiled, benchmarked, and executed across various physical backends. The framework provides auditable multi-layer resource estimates and supports up to 5 logical qubits, aiming to standardize the evaluation and validation of QEC designs on physical testbed hardware.