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Quint Computing Secures €9.1M ($10.2M USD) Seed Round to Scale Hardware-Level Quantum Error Correction

Erlangen-based quantum hardware startup Quint Computing has raised €9.1 million ($10.2 million USD) in seed funding, marking Germany’s largest-ever first financing round for a quantum computing firm. Led by Vsquared Ventures, the round includes backing from Quantonation, Nucleus Capital, Faber, Vanagon Ventures, ZOHO.VC, and Mikko Möttönen (co-founder of IQM and QMill). The equity capital is paired with a competitive €2.2 million ($2.46 million USD) European Innovation Council (EIC) Pathfinder grant, funding the commercialization of an architecture designed to reduce physical error-correction overhead by up to a factor of 100.

Quint Computing Corporate & Technical Specifications
DimensionKey DetailsOperational & Architectural Context
Founding & OriginsFounded Oct 2025; spin-out from FAU Erlangen-NürnbergPart of the Munich Quantum Valley; led by Prof. Christopher Eichler (CEO), Prof. Michael Hartmann (CTO), and Dr. Jona Stinner (CFO).
Advisory BoardProf. Florian Marquardt, Dr. Reinhard Ploss, Dr. Markus HoffmannDraws leadership from the Max Planck Institute for the Science of Light, Infineon Technologies, and Google Quantum AI.
Hardware ArchitectureSuperconducting circuits with continuous electrical stabilizationSuppresses dominant error mechanisms directly within physical circuit elements rather than relying solely on multi-qubit code concatenation.
Commercial RoadmapIndustrial pilots with Bosch, BASF, and Boehringer IngelheimTargets fault-tolerant simulation of complex chemical processes (e.g., liver enzyme drug metabolism) and materials design.
Expansion GoalsTeam growth from 10 to ~40 specialists by 2028Recruiting across chip layout, cleanroom fabrication, decoder implementation, and algorithmic applications.

Conventional superconducting architectures running 2D surface codes typically require thousands of physical qubits to encode a single protected logical qubit because physical error rates remain close to threshold boundaries. Quint’s patented design integrates continuous electrical control directly into the processor layout to stabilize individual circuit elements against noise before outer software codes are applied. By establishing an engineered error hierarchy at the physical level—analogous to biased bosonic systems—the platform aims to run streamlined error-correcting codes that preserve native gate clock speeds while significantly lowering cryogenic heat loads and physical wiring counts.

While the founders have demonstrated single-element stabilization in prior research at ETH Zurich and Google Quantum AI, the primary technical milestone for the company will be scaling multi-qubit fabrics without degrading gate speeds or inducing spectator-qubit crosstalk during two-qubit entangling operations.

Review the Official Press Release here with investment details shared in the LinkedIn Announcement here.

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