Quantum error correction (QEC) technology provider Riverlane and NVIDIA have announced technical benchmarks demonstrating GPU acceleration for decoder recalibration in quantum error-correcting systems.
A decoder relies on numerical weights representing hardware error probabilities to infer and correct logical faults. Because physical qubits experience parameter drift over time due to frequency shifts, defect activation, and gate fidelity degradation, decoder settings gradually lose accuracy. This instability requires frequent recalibration between experimental runs. By executing artificial intelligence (AI) calibration loops on NVIDIA GPU hardware, the collaboration aims to automate and accelerate this recalibration process.
The calibration loop utilizes Riverlane’s Local Clustering Decoder (LCD) adapted for high-throughput GPU processing, evaluating candidate decoder weights directly against experimental hardware data. The optimization protocol draws inspiration from prior-optimization frameworks developed at Google Quantum AI.
| [ Decoder Recalibration Benchmarks: CPU vs. NVIDIA H100 GPU ] | |||
|---|---|---|---|
| QEC Code / Benchmark | Single-Core CPU Performance | NVIDIA H100 GPU Performance | Acceleration Factor |
| • Surface Code Epoch Time | • ~180 seconds (3.0 minutes) | • 2.8 seconds | • 65x faster training epoch |
| • Surface Code Throughput | • ~59,000 syndromes / sec | • > 4,200,000 syndromes / sec | • 71x raw throughput gain |
| • Repetition Code Epoch Time | • Baseline single-core CPU | • Reduced epoch duration | • 43x faster training epoch |
| • Repetition Code Throughput | • Baseline single-core CPU | • ~155,000,000 syndromes / sec | • 121x raw throughput gain |
| • 32-Core CPU Comparison | • ~23x speedup vs. 1-core CPU | • 2.8 seconds (single H100) | • H100 remains 3x faster than 32 CPU cores |
By processing batch syndrome workloads in parallel across thousands of threads, the H100 GPU reduces surface-code training epochs from minutes to seconds. Depending on the code structure, optimizing the decoder priors against physical device drift yielded logical error rate (LER) reductions ranging from several percent up to a factor of two compared to uncalibrated initial priors.
The collaboration highlights a growing role for heterogeneous classical computing architectures in the quantum control stack, where GPUs handle offline learning and optimization tasks while real-time QEC systems—such as Riverlane’s Deltaflow technology—process low-latency decoding during circuit execution.
Review the technical update on the Riverlane Newsroom here, examine technical commentary on the Riverlane Blog here, and inspect foundational prior-optimization research on arXiv here.
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