Figure Comparing Bit Flips, Phase Flips, and Erasure Errors. Credit: AWS

There are a lot of different quantum error corrections being researched right now and Amazon has just published a paper on Physical Review X that shows an additional one they are researching. This actually came a little bit as a surprise to us because they had previously published papers on some completely different error correction algorithms including one on Schrödinger-cat qubits and another on concatenating the surface code with Gottesman, Kitaev, and Preskill (GKP) qubits. As explained to us by Dr. Oskar Painter, Head of Quantum Hardware at Amazon Web Services, this research into dual-rail erasure qubits started as an exploratory effort and the team was quite pleased to find some very good results from these initial tests. They still have much more work to continue with before concluding that this approach can be scaled up and usable in a production quantum computer. But still, it is always helpful for a development group to have different options available for key components in an engineering project.

One of the challenges with other error correction codes is that when an error occurs, it is not straightforward to determine where it occurred. One can’t just measure a qubit, because it will collapse upon measurement and destroy the state. An erasure code is different because it will allow you determine which qubit has the error because the dual-rail qubit will collapse to a non-valid state which can be sensed by an ancilla qubit.

Conceptual Figure Showing an Erasure Error. Credit: AWS

The dual-rail erasure qubit approach has several advantages. First, it is highly compatible with the superconducting transmon qubits approach the company is using. Although, it will require double the number of control wires, it will otherwise be quite similar to the architecture they have been working on. Another major advantage is that this approach makes it much easier to create an error corrected quantum computer because it reduces the common type of errors, bit flips and phase flips, to much lower levels. One of the measures that is used for error correction is the required Physical-to-Logical qubit ratio. Quite often, people are assuming that it could take as many as 1000 physical qubits to create one logical error corrected qubit. A quantum computer based upon this erasure qubit would still need to have another error correction code on top of it, such as a surface code or one of the other codes, but that code would require 10X fewer physical qubits because of the reduction in the bit and phase flip errors. Another advantage is that the team has found very little degradation in performance because the identification of the error can occur in real time using an ancilla qubit.

The AWS research team will be continuing to research this concept. The next steps will involve building a test chip with a larger number of qubits and testing how the various gate types can be implemented with these dual-rail erasure qubits. It will need to support by the Clifford gates as well as the more difficult non-Clifford gates in order to support a universal gate set that can process any quantum algorithm.

For additional information about this research you can view a blog posted on the AWS website here, and two technical papers available on the Physical Review X website here and here.

March 23, 2024