A research collaboration between QuEra Computing, Harvard University, and MIT has reported a quantum error correction (QEC) result demonstrating a physical-to-logical qubit ratio of approximately 2:1. The research utilizes a family of quantum Low-Density Parity-Check (qLDPC) codes co-designed for reconfigurable neutral-atom hardware. While standard QEC approaches often require high physical qubit overhead to encode a single logical qubit, this implementation achieves encoding rates exceeding 1/2 by utilizing non-commuting affine permutation matrices—a construction developed by Kenta Kasai (2026).

The technical implementation leverages the ability of neutral-atom arrays to move qubits in parallel using Acousto-Optic Deflectors (AODs). By aligning the code structure with the hardware’s row-column movement constraints, the team enabled syndrome extraction in constant time. The study verified two high-rate code instances through circuit-level noise simulations:

  • [[1152, 580, ≤12]]: Encodes 580 logical qubits into 1,152 physical qubits (Rate: 0.503), protecting against up to 5 errors.
  • [[2304, 1156, ≤14]]: Encodes 1,156 logical qubits into 2,304 physical qubits (Rate: 0.502), protecting against up to 6 errors.

Simulations using a circuit-level noise model (p=0.1%) achieved a per-logical-per-round error rate of approximately 1.3×10−13. This performance enters the “Teraquop” regime, which corresponds to one error per trillion logical operations—a threshold required for algorithms in molecular simulation and cryptanalysis. This result suggests that the physical hardware scale required for fault-tolerant computation may be smaller than previous estimates. While the findings establish a baseline for quantum memory, additional development is required to implement the full set of fault-tolerant logical gates.

For the full technical details, access the paper “Towards Ultra-High-Rate Quantum Error Correction with Reconfigurable Atom Arrays” on arXiv here. A plain-language summary is available via the QuEra blog here.

April 20, 2026

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