Post-quantum hardware engineer SEALSQ Corp (Nasdaq: LAES) and foundry group GlobalFoundries (Nasdaq: GFS) have signed a strategic Memorandum of Understanding (MoU) to co-develop secure semiconductor platforms, post-quantum cryptography (PQC) IP, and cryogenic silicon control layers. The development track links GlobalFoundries’ commercial Complementary Metal-Oxide-Semiconductor (CMOS) fabrication processes and bulk manufacturing volume with SEALSQ’s hardware-based certified security cores and PQC-ready root-of-trust modules. The joint initiative focuses on moving quantum computing hardware out of boutique lab setups by manufacturing essential system control units within established, high-volume semiconductor cleanrooms.

                         [ SEALSQ - GlobalFoundries Alliance Matrix ]
  Manufacturing Hub   ──► GlobalFoundries high-volume U.S. and European fabrication facilities.
  Hardware IP Module  ──► Hard macro certified PQC blocks engineered with MIPS architecture.
  Cryogenic Engine    ──► CryoCMOS ASICs for sub-Kelvin quantum processing unit (QPU) control.
  Sovereign Mandate   ──► Secure, traceable supply chain alignment supporting U.S. and European policies.

The corporate partnership targets three primary technological segments:

  • Certified PQC Security IP Integration: In collaboration with MIPS (a GlobalFoundries subsidiary), the engineering groups will design pre-certified PQC security IP hard macro blocks and Chiplet Hardware Security Module (CHSM) components. These functional blocks act as hardware-based roots of trust for Secure Enclaves, enabling semiconductor developers to embed hardware-level quantum-resistant protection directly during the initial silicon layout phase rather than implementing it as a post-fabrication software layer.
  • Cryogenic CMOS (CryoCMOS) Architectures: Building on SEALSQ’s quantum ASIC design track and GlobalFoundries’ dedicated Quantum Technology Solutions division, the partners will co-develop custom cryoelectronic ASICs. These specialized chips operate at the ultra-low, sub-Kelvin temperatures required inside quantum refrigeration chambers to stabilize fragile qubits, substituting bulky external classical wires with integrated, on-chip control elements.
  • Sovereign Supply Chain Stabilization: The fabrication workflow is physically routed through GlobalFoundries’ established manufacturing facilities within the United States and Europe. This operational footprint directly addresses U.S. and European Union national security priorities for secure, audited, and traceable semiconductor production, shielding critical defense, data center, and smart energy grid components from supply chain intervention.

The engineering roadmaps are supervised by SEALSQ CEO Carlos Moreira and GlobalFoundries VP of Quantum Technology Solutions Nicholas Sergeant. The multi-year framework integrates automated cryptographic accelerators inside high-growth modular chiplet configurations, offering a scalable method to protect automotive platforms, defense communication pipelines, and IoT network infrastructure against quantum-enabled decryption strategies. By utilizing GlobalFoundries’ existing high-volume silicon platforms, the partner companies aim to reduce manufacturing costs and technical error limits for customers scaling hybrid classical-quantum digital infrastructure.

The official strategic partnership announcements, technological integration roadmaps, and international semiconductor manufacturing parameters can be reviewed here.

July 8, 2026

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