Chinese quantum computing developer SpinQ has finalized a RMB 1 billion (~$147 million USD) Series D financing round. This latest transaction brings the Shenzhen-based company’s total capital raised over a six-month window to RMB 2 billion, following a sequence of intensive private funding injections that mirror a broader consolidation trend across China’s domestic quantum computing industrial sector. Backed by a diverse coalition of sovereign, financial, and industrial investment platforms—including CICC Capital, Shenzhen TopoScend Capital, Shanghai Semiconductor Industry Investment, AVIC Honghua, and Shanghai SEARI Private Equity Investment Management—the fresh capital will be directed toward full-stack engineering of fault-tolerant general-purpose quantum computers, upgrading fabrication cleanroom processes, and scaling the company’s global export ecosystem.

                    [ SpinQ Full-Stack Production & Control Loop ]
  [ Software / EDA Layer ] ──► [ Localized Foundries ] ──► [ System Assembly ] ──► [ User Task Routing ]
   Integrated Circuit Des.      25 & 103-Qubit Tape-Outs     Full-System Packaging     Ursa Major Batch Deliv.

The engineering roadmap pivots from raw qubit accumulation metrics toward systemic physical validation and automated error mitigation. SpinQ is actively pursuing a dual-track strategy focused on both theoretical algorithmic optimizations and experimental physical safeguards. On the theoretical front, the company’s research on cascaded quantum Hamming code decoding structures has been accepted for formal presentation at the upcoming IEEE International Conference on Quantum Computing and Engineering (QCE 2026). Simultaneously, the hardware engineering team is working to finalize physical validation metrics for distance-three ($d=3$) surface-code quantum error correction (QEC), a critical benchmark required to isolate and correct transient phase- and bit-flip errors before they propagate through active logical computations.

To preserve end-to-end sovereignty over its underlying system components, SpinQ has integrated its own full-stack development and pilot-line foundry infrastructure in Shenzhen. This vertically integrated manufacturing capability bridges the technical space between automated chip design software and physical system deployment, encompassing native chip layouts, electronic design automation (EDA) software tools, control planes, full-system packaging, and downstream cloud execution loops. The company has successfully executed the tape-out, high-density packaging, and functional validation of its next-generation 25-qubit and 103-qubit superconducting quantum processing units (QPUs). This hardware baseline powers the company’s “Ursa Major” superconducting computers, supporting batch system deliveries to research laboratories, sovereign industrial clients, and academic networks spanning more than 40 countries and regions worldwide.

The full strategic capitalization breakdowns, structural engineering roadmap objectives, and institutional ecosystem portfolios can be reviewed via the official SpinQ Corporate Newsroom here. Comprehensive historical context tracking the company’s capital scaling milestones can be audited in the previous commercial report covering its Series C round here and its industrial growth targets here.

June 30, 2026

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