Mohamed Abdel-Kareem

TOYO Corporation has expanded its quantum hardware by acquiring an IQM Spark (5-qubit) in addition to its previous order of a 20-qubit IQM Radiance processor from IQM Quantum Computers. These systems, expected to be operational by early 2027, will establish a dual-QPU testbed in Japan, offering open access to universities, startups, and industrial researchers to advance quantum technology and achieve national strategic targets.

NVIDIA has launched CUDA-Q Logical, an extension to its open-source accelerated quantum computing platform, aimed at accelerating fault-tolerant quantum computing by unifying the design of high-level algorithms, quantum error correction codes, and QPU micro-architectures. This framework, detailed in a new research publication, allows for direct derivation of full-stack resource estimates and has shown significant speedups in fault-tolerant system resource modeling at national laboratories like Fermilab. The release coincides with wide adoption of NVIDIA’s NVQLink interconnect and GPU-accelerated quantum simulation libraries, fostering an auditable foundation for utility-scale quantum-GPU supercomputers.

A collaboration including MITRE, Quantum Brilliance, NVIDIA, and SandboxAQ has developed a GPU-accelerated digital twin framework for quantum sensor error attribution, detailed in an arXiv preprint. This framework automates error budgeting by evaluating sensitivity, accuracy bias, and parameter-drift robustness, identifying key performance limiters for NV diamond ensembles and validating on a cesium OPM array for biomagnetic imaging. The research highlights that optimizing for sensitivity alone doesn't guarantee accuracy and that software-based noise rejection is crucial for clinical targets.

At IEEE Quantum Week 2026, IonQ presented nine peer-reviewed papers, with four receiving Best Paper Awards, showcasing advancements in hybrid HPC and quantum-AI workflows. Their work, utilizing IonQ's quantum hardware alongside NVIDIA software, demonstrated significant progress in enterprise engineering optimization (e.g., accelerating 35-million-element mesh simulations by up to 14.6% with Synopsys), quantum-accelerated AI architectures (e.g., 24% error reduction in AI classification with QuantumBasel), and dynamic error mitigation. This research highlights the practical application and performance benefits of quantum computing across various fields.

QC Design has integrated its Plaquette platform with NVIDIA CUDA-Q Logical, announced on September 14, 2026. This integration allows for hardware-realistic fault-tolerant quantum computing (FTQC) simulations by connecting high-level quantum error correction (QEC) circuit compilation with device-specific physical noise models. This enables evaluation of QEC code structures under continuous non-Pauli noise models, addressing discrepancies in traditional FTQC resource estimation. An initial study showed a 0.2% leakage rate on two-qubit entangling gates degraded the fault-tolerant circuit noise threshold by approximately 60%.

At IEEE Quantum Week 2026, IQM Quantum Computers announced the adoption of NVIDIA CUDA-Q Logical within their Halocene quantum error correction product line. This integration allows for the standardization of high-level logical circuit descriptions, enabling QEC algorithm workloads to be compiled, benchmarked, and executed across various physical backends. The framework provides auditable multi-layer resource estimates and supports up to 5 logical qubits, aiming to standardize the evaluation and validation of QEC designs on physical testbed hardware.

A research collaboration involving UCLA, Caltech, and NVIDIA has developed a machine-learning framework utilizing a Fourier Neural Operator (FNO) for the inverse design of quantum control pulse sequences. This FNO-based method significantly accelerates the synthesis of quantum control sequences, achieving a 10⁷x speedup and reducing computation time from 10 hours to 10-20 minutes, with an 86.2% success rate in preparing target quantum states. The framework, built on NVIDIA's CUDA-Q platform, offers a differentiable approach for optimizing laser pulse parameters in molecular quantum dynamics.

QCentroid has integrated NVIDIA CUDA-Q into its QuantumOps platform, creating an enterprise hybrid application design framework. This new system automates the placement of quantum components within classical HPC software, allowing for the optimization of classical-quantum boundaries in AI, simulation, and generative modeling. Demonstrated on a cGAN for catalyst materials discovery, the platform evaluates various hybrid Generator designs against classical baselines, leveraging GPU-accelerated simulation and quantum processing units for performance assessment.

BlueQubit has launched the "Quantum Flywheel" grant program, offering $150,000 in compute credits over three months for quantum algorithm discovery, adversarial classical simulation, and quantum error correction research. Supported by IBM, AWS, and NVIDIA, the program provides access to QPU, GPU, and CPU hardware, along with BlueQubit's development environment, for selected research teams. The initiative aims to advance quantum computing through open-source contributions, peer-reviewed research, and AI-driven QEC code discovery.

Quandela and NVIDIA have collaborated on a technical white paper outlining an architecture to integrate photonic Quantum Processing Units (QPUs) with classical AI and HPC environments using NVIDIA NVQLink. This framework connects Quandela's Quantum System Controller (QSC) to NVIDIA GPU nodes via a low-latency interconnect, enabling GPU-accelerated simulations, quantum error correction, and QPU pulse calibration within a unified host process running NVIDIA CUDA-Q and the MerLin Quantum Machine Learning framework. This initiative aims to facilitate the commercial adoption of hybrid quantum-classical computing across various phases, from cloud-hosted experimentation to scalable, fault-tolerant deployments.