Neutral-atom quantum hardware and software developer Infleqtion (NYSE: INFQ) has integrated its open-source qLDPC software library with NVIDIA CUDA-Q Logical, an newly introduced logical orchestration and compiler layer within the CUDA-Q software suite. Announced at IEEE Quantum Week 2026, the integration establishes an end-to-end software pipeline to construct, compile, and validate high-rate quantum error correction (QEC) codes tailored for reconfigurable neutral-atom architectures.

Using the framework, Infleqtion constructed and validated a Hypergraph-Product Simplex (HGPS) quantum low-density parity-check (qLDPC) code block with published parameters of [[98,18,4]]. Derived from a 7-bit cyclic classical simplex seed with [7,3,4] parameters, the code block encodes 18 logical qubits into 98 physical data qubits—requiring approximately 5.4 physical data qubits per logical qubit—yielding an 18.4% encoding rate. This represents a roughly fivefold reduction in data-qubit overhead compared to standard distance-3 surface codes (which require 9 physical data qubits per logical qubit).

[ Infleqtion HGPS qLDPC Code & CUDA-Q Logical Integration Specifications ]
Code Parameter / MetricHGPS [[98,18,4]] ImplementationCUDA-Q Logical Compiler Function
Physical Qubit Footprint• 98 Physical Data Qubits
• 49 X-Checks & 49 Z-Checks (Weight-6)
• Sparse-Row Support Allocation
• Automated Patch & Block Binding
Logical Qubit Capacity• 18 Encoded Logical Qubits
• Code Distance d = 4 (Weight-4 Logicals)
• Multi-Owner Logical Memory Management
• Product Measurement Compilation
Encoding Efficiency• ~5.4 Physical Data Qubits / Logical Qubit
• 18.4% Physical-to-Logical Code Rate
• Automated Stabilizer Commutativity Checks
• Joint Observable Placement & QEC Pipeline

The compilation pipeline builds on algorithm research for reconfigurable neutral-atom arrays developed in collaboration with Professor Fred Chong’s laboratory. By mapping the [[98,18,4]] HGPS algebra directly into CUDA-Q Logical’s compiler passes, Infleqtion verified stabilizer commutativity over GF(2), confirmed that 49 X-checks and 49 Z-checks commute, and executed multi-owner logical memory allocation. The team demonstrated this by compiling a joint X-by-Z product measurement across two distinct logical qubit owners within a single HGPS block, verifying that ownership structure and logical allocation calls are preserved without multiplying block overhead.

This software integration establishes an operational baseline for Infleqtion to extend its neutral-atom QEC stack toward physical hardware execution. The immediate roadmap includes defining physical syndrome extraction schedules, attaching atom loss and leakage noise semantics, generating detector error models, and benchmarking real-time GPU decoders via the NVIDIA Ising platform. The milestone builds on Infleqtion’s corporate and technical trajectory following its merger with Churchill Capital Corp X and its recent distributed quantum networking initiatives with Cisco.

Review the news release via Infleqtion here and inspect the technical breakdown on Infleqtion Blog here.

September 14, 2026